From ca448546b736f3ff0ea3163220fbd7dc48fc5bbc Mon Sep 17 00:00:00 2001
From: Piotr Kubaj <pkubaj@FreeBSD.org>
Date: Wed, 16 Sep 2026 14:45:19 +0200
Subject: [PATCH 1/5] Add PowerPC64 (VSX) support via clang's x86 intrinsic
 wrappers

clang ships ppc_wrappers/{x,e,p,t,s,n}mmintrin.h that implement the
SSE..SSE4.2 intrinsics on top of VSX (POWER8 and later), which is the
ISA level the SSE4.2 kernels need.  Treat powerpc64 hosts like the
AArch64 path: define the x86 ISA macros by hand in clang.cmake, mark the
platform as 64-bit, report SSE4.2 features at runtime, and opt into the
wrapper headers from platform.h so that every translation unit including
embree headers gets them.  The few intrinsics the wrappers lack
(_mm_popcnt_u32/u64, _mm_dp_ps, _mm_insert_ps, _mm_stream_load_si128)
and the MXCSR control family (no POWER equivalent; FTZ/DAZ become
no-ops) get small definitions in intrinsics.h.

Tested with clang 19 on FreeBSD powerpc64le and powerpc64 (big-endian):
the ANARI SDK helide device renders all 13 of its test scenes
pixel-identical to an x86-64 build.
---
 CMakeLists.txt           |  3 +++
 common/cmake/clang.cmake |  3 +++
 common/sys/intrinsics.h  | 31 +++++++++++++++++++++++++++++++
 common/sys/platform.h    |  8 +++++++-
 common/sys/sysinfo.cpp   |  7 +++++++
 5 files changed, 51 insertions(+), 1 deletion(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index 37a553dd64..c25a66c854 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -228,6 +228,9 @@ ELSEIF(CMAKE_SYSTEM_NAME STREQUAL "Windows" AND CMAKE_GENERATOR_PLATFORM STREQUA
 ELSEIF(CMAKE_SYSTEM_PROCESSOR STREQUAL "aarch64" OR CMAKE_SYSTEM_PROCESSOR STREQUAL "ARM64")
   MESSAGE(STATUS "Building for AArch64")
   SET(EMBREE_ARM ON)
+ELSEIF(CMAKE_SYSTEM_PROCESSOR MATCHES "^(powerpc|ppc)64")
+  MESSAGE(STATUS "Building for PowerPC64")
+  SET(EMBREE_PPC64 ON)
 ENDIF()
 
 SET(EMBREE_TASKING_SYSTEM "TBB" CACHE STRING "Selects tasking system")
diff --git a/common/cmake/clang.cmake b/common/cmake/clang.cmake
index ecb5f399db..f13fc019d0 100644
--- a/common/cmake/clang.cmake
+++ b/common/cmake/clang.cmake
@@ -21,6 +21,9 @@ IF (EMBREE_ARM)
     SET(FLAGS_AVX "-D__AVX__ -D__SSE4_2__  -D__SSE4_1__  -D__BMI__ -D__BMI2__ -D__LZCNT__")
     SET(FLAGS_AVX2 "-D__AVX2__ -D__AVX__ -D__SSE4_2__  -D__SSE4_1__  -D__BMI__ -D__BMI2__ -D__LZCNT__")
   ENDIF ()
+ELSEIF (EMBREE_PPC64)
+  SET(FLAGS_SSE2 "-D__SSE__ -D__SSE2__ -mcpu=power8")
+  SET(FLAGS_SSE42 "-D__SSE4_2__  -D__SSE4_1__ -mcpu=power8")
 ELSE ()
   # for `thread` keyword
   _SET_IF_EMPTY(FLAGS_SSE2  "-msse -msse2 -mno-sse4.2")
diff --git a/common/sys/intrinsics.h b/common/sys/intrinsics.h
index fb6610605d..d3851db0c1 100644
--- a/common/sys/intrinsics.h
+++ b/common/sys/intrinsics.h
@@ -13,6 +13,37 @@
 #include "../simd/arm/emulation.h"
 #else
 #include <immintrin.h>
+#if defined(__powerpc64__) && defined(__clang__)
+__forceinline unsigned int _mm_getcsr() { return 0; }
+__forceinline void _mm_setcsr(unsigned int) {}
+__forceinline int _mm_popcnt_u32(unsigned int v) { return __builtin_popcount(v); }
+__forceinline long long _mm_popcnt_u64(unsigned long long v) { return __builtin_popcountll(v); }
+__forceinline __m128i _mm_stream_load_si128(__m128i* p) { return _mm_load_si128(p); }
+__forceinline __m128 _mm_dp_ps(__m128 a, __m128 b, const int imm) {
+  const __m128i hi = _mm_set_epi32((imm & 0x80) ? -1 : 0, (imm & 0x40) ? -1 : 0, (imm & 0x20) ? -1 : 0, (imm & 0x10) ? -1 : 0);
+  const __m128i lo = _mm_set_epi32((imm & 0x08) ? -1 : 0, (imm & 0x04) ? -1 : 0, (imm & 0x02) ? -1 : 0, (imm & 0x01) ? -1 : 0);
+  __m128 p = _mm_and_ps(_mm_mul_ps(a, b), _mm_castsi128_ps(hi));
+  p = _mm_hadd_ps(p, p);
+  p = _mm_hadd_ps(p, p);
+  return _mm_and_ps(p, _mm_castsi128_ps(lo));
+}
+__forceinline __m128 _mm_insert_ps(__m128 a, __m128 b, const int imm) {
+  float ta[4], tb[4];
+  _mm_storeu_ps(ta, a);
+  _mm_storeu_ps(tb, b);
+  ta[(imm >> 4) & 3] = tb[(imm >> 6) & 3];
+  for (int i = 0; i < 4; i++) if (imm & (1 << i)) ta[i] = 0.0f;
+  return _mm_loadu_ps(ta);
+}
+#define _MM_MASK_DENORM 0x0100
+#define _MM_MASK_DIV_ZERO 0x0200
+#define _MM_MASK_MASK 0x1f80
+#define _MM_FLUSH_ZERO_ON 0x8000
+#define _MM_DENORMALS_ZERO_ON 0x0040
+#define _MM_DENORMALS_ZERO_OFF 0x0000
+#define _MM_DENORMALS_ZERO_MASK 0x0040
+#define _MM_SET_EXCEPTION_MASK(x) _mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x))
+#endif
 #if defined(__EMSCRIPTEN__)
 #include "../simd/wasm/emulation.h"
 #endif
diff --git a/common/sys/platform.h b/common/sys/platform.h
index 73bb412aa8..776a3b8277 100644
--- a/common/sys/platform.h
+++ b/common/sys/platform.h
@@ -57,12 +57,18 @@
 #define __X86_ASM__
 #endif
 
+#if defined(__powerpc64__)
+#define NO_WARN_X86_INTRINSICS
+#define __SSE__
+#define __SSE2__
+#endif
+
 /* detect 64 bit platform */
 #if defined(__aarch64__) || defined(_M_ARM64)
 #define EMBREE_ARM64
 #endif
 
-#if defined(__X86_64__) || defined(EMBREE_ARM64)
+#if defined(__X86_64__) || defined(EMBREE_ARM64) || defined(__powerpc64__)
 #define __64BIT__
 #endif
 
diff --git a/common/sys/sysinfo.cpp b/common/sys/sysinfo.cpp
index 81e6cd23d8..843d9f1e1a 100644
--- a/common/sys/sysinfo.cpp
+++ b/common/sys/sysinfo.cpp
@@ -429,6 +429,13 @@ namespace embree
 #endif
     return cpu_features;
 
+#elif defined(__powerpc64__)
+
+    int cpu_features = CPU_FEATURE_SSE|CPU_FEATURE_SSE2|CPU_FEATURE_SSE3|CPU_FEATURE_SSSE3;
+    cpu_features |= CPU_FEATURE_SSE41|CPU_FEATURE_SSE42|CPU_FEATURE_POPCNT;
+    cpu_features |= CPU_FEATURE_XMM_ENABLED;
+    return cpu_features;
+
 #elif defined(__ARM_NEON) || defined(EMBREE_ARM64) || defined(__EMSCRIPTEN__)
 
     int cpu_features = CPU_FEATURE_NEON|CPU_FEATURE_SSE|CPU_FEATURE_SSE2;

From 586d44bfbcb6d769afc288d3ae8936abdddd3610 Mon Sep 17 00:00:00 2001
From: Piotr Kubaj <pkubaj@FreeBSD.org>
Date: Mon, 21 Sep 2026 10:45:31 +0200
Subject: [PATCH 2/5] PowerPC64: honor -mcpu, fix the standalone build and add
 ISPC support

Follow-up after building and testing embree standalone (the first commit
was only exercised through the ANARI SDK's bundled copy):

- Take a -mcpu= from CMAKE_CXX_FLAGS into the ISA flags instead of
  always forcing -mcpu=power8, so that e.g. -mcpu=power9 is not
  downgraded. power8 remains the default; the x86 intrinsic wrappers
  need it.
- The AVX/AVX2/AVX-512/APX compiler probes pass trivially without any
  x86 flags, which made the build try to compile the AVX kernels. Switch
  them off explicitly.
- The tutorials need _MM_SET_FLUSH_ZERO_MODE, which clang's wrappers do
  not provide.
- ISPC 1.31.0 added ppc64le with VSX targets: use vsx-i32x4 (ISPC only
  allows one VSX variant per object) and --arch=ppc64le for the ISPC
  tutorials.

Tested as a backport to embree 4.4.1 with clang 19 on FreeBSD
powerpc64le and powerpc64 (big-endian): embree_verify passes (112 test
groups, 0 failures) on both, and the tutorials render identically through
the C++ and the ISPC 1.31.0 paths on powerpc64le.
---
 CMakeLists.txt           | 15 +++++++++++++--
 common/cmake/clang.cmake |  9 +++++++--
 common/cmake/ispc.cmake  |  2 ++
 common/sys/intrinsics.h  |  2 ++
 4 files changed, 24 insertions(+), 4 deletions(-)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c25a66c854..c04b71e0a7 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -391,6 +391,13 @@ IF (EMBREE_MAX_ISA STREQUAL "NONE")
     TRY_COMPILE(COMPILER_SUPPORTS_AVX2    "${CMAKE_BINARY_DIR}" "${PROJECT_SOURCE_DIR}/common/cmake/check_isa.cpp" COMPILE_DEFINITIONS ${FLAGS_AVX2})
     TRY_COMPILE(COMPILER_SUPPORTS_AVX512  "${CMAKE_BINARY_DIR}" "${PROJECT_SOURCE_DIR}/common/cmake/check_isa.cpp" COMPILE_DEFINITIONS ${FLAGS_AVX512})
     TRY_COMPILE(COMPILER_SUPPORTS_APX     "${CMAKE_BINARY_DIR}" "${PROJECT_SOURCE_DIR}/common/cmake/check_isa.cpp" COMPILE_DEFINITIONS ${FLAGS_APX})
+    IF (EMBREE_PPC64)
+      # the probes pass trivially without any x86 flags
+      SET(COMPILER_SUPPORTS_AVX OFF)
+      SET(COMPILER_SUPPORTS_AVX2 OFF)
+      SET(COMPILER_SUPPORTS_AVX512 OFF)
+      SET(COMPILER_SUPPORTS_APX OFF)
+    ENDIF ()
   
     OPTION(EMBREE_ISA_SSE2 "Enables SSE2 ISA." ON)
     OPTION(EMBREE_ISA_SSE42 "Enables SSE4.2 ISA." ON)
@@ -566,6 +573,10 @@ IF (EMBREE_ARM)
   ENDIF()
 ENDIF()
 
+IF (EMBREE_PPC64)
+  LIST(APPEND ISPC_TARGETS "vsx-i32x4")
+ENDIF()
+
 IF (EMBREE_ISA_NEON)
   SET(EMBREE_ISA_SSE2 ON)
 ENDIF()
@@ -579,7 +590,7 @@ ENDIF()
 
 IF (EMBREE_ISA_SSE2)
   ADD_DEFINITIONS(-DEMBREE_TARGET_SSE2)
-  IF (NOT EMBREE_ARM)
+  IF (NOT EMBREE_ARM AND NOT EMBREE_PPC64)
     LIST(APPEND ISPC_TARGETS "sse2")
   ENDIF()
   IF(NOT FLAGS_LOWEST)
@@ -590,7 +601,7 @@ ENDIF()
 
 IF (EMBREE_ISA_SSE42)
   ADD_DEFINITIONS(-DEMBREE_TARGET_SSE42)
-  IF (NOT EMBREE_ARM)
+  IF (NOT EMBREE_ARM AND NOT EMBREE_PPC64)
     LIST(APPEND ISPC_TARGETS "sse4")
   ENDIF()
   IF(NOT FLAGS_LOWEST)
diff --git a/common/cmake/clang.cmake b/common/cmake/clang.cmake
index f13fc019d0..1ba7ec1faf 100644
--- a/common/cmake/clang.cmake
+++ b/common/cmake/clang.cmake
@@ -22,8 +22,13 @@ IF (EMBREE_ARM)
     SET(FLAGS_AVX2 "-D__AVX2__ -D__AVX__ -D__SSE4_2__  -D__SSE4_1__  -D__BMI__ -D__BMI2__ -D__LZCNT__")
   ENDIF ()
 ELSEIF (EMBREE_PPC64)
-  SET(FLAGS_SSE2 "-D__SSE__ -D__SSE2__ -mcpu=power8")
-  SET(FLAGS_SSE42 "-D__SSE4_2__  -D__SSE4_1__ -mcpu=power8")
+  # the x86 intrinsic wrappers need POWER8, honor a newer -mcpu from the user
+  STRING(REGEX MATCH "-mcpu=[^ ]+" FLAGS_PPC64_CPU "${CMAKE_CXX_FLAGS}")
+  IF (NOT FLAGS_PPC64_CPU)
+    SET(FLAGS_PPC64_CPU "-mcpu=power8")
+  ENDIF ()
+  SET(FLAGS_SSE2 "-D__SSE__ -D__SSE2__ ${FLAGS_PPC64_CPU}")
+  SET(FLAGS_SSE42 "-D__SSE4_2__  -D__SSE4_1__ ${FLAGS_PPC64_CPU}")
 ELSE ()
   # for `thread` keyword
   _SET_IF_EMPTY(FLAGS_SSE2  "-msse -msse2 -mno-sse4.2")
diff --git a/common/cmake/ispc.cmake b/common/cmake/ispc.cmake
index 7a4abaeb85..957dd66de9 100644
--- a/common/cmake/ispc.cmake
+++ b/common/cmake/ispc.cmake
@@ -75,6 +75,8 @@ MACRO (ISPC_COMPILE)
   IF (CMAKE_SIZEOF_VOID_P EQUAL 8)
     IF (${CMAKE_SYSTEM_PROCESSOR} MATCHES "arm64|aarch64")
       SET(ISPC_ARCHITECTURE "aarch64")
+    ELSEIF (${CMAKE_SYSTEM_PROCESSOR} MATCHES "^(powerpc|ppc)64le")
+      SET(ISPC_ARCHITECTURE "ppc64le")
     ELSE()
       SET(ISPC_ARCHITECTURE "x86-64")
     ENDIF()
diff --git a/common/sys/intrinsics.h b/common/sys/intrinsics.h
index d3851db0c1..6b58e5ecc3 100644
--- a/common/sys/intrinsics.h
+++ b/common/sys/intrinsics.h
@@ -38,11 +38,13 @@ __forceinline __m128 _mm_insert_ps(__m128 a, __m128 b, const int imm) {
 #define _MM_MASK_DENORM 0x0100
 #define _MM_MASK_DIV_ZERO 0x0200
 #define _MM_MASK_MASK 0x1f80
+#define _MM_FLUSH_ZERO_MASK 0x8000
 #define _MM_FLUSH_ZERO_ON 0x8000
 #define _MM_DENORMALS_ZERO_ON 0x0040
 #define _MM_DENORMALS_ZERO_OFF 0x0000
 #define _MM_DENORMALS_ZERO_MASK 0x0040
 #define _MM_SET_EXCEPTION_MASK(x) _mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x))
+#define _MM_SET_FLUSH_ZERO_MODE(x) _mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | (x))
 #endif
 #if defined(__EMSCRIPTEN__)
 #include "../simd/wasm/emulation.h"

From fa062196602110d4070e71eb76cd381bf365b495 Mon Sep 17 00:00:00 2001
From: Piotr Kubaj <pkubaj@FreeBSD.org>
Date: Thu, 8 Oct 2026 20:57:47 +0200
Subject: [PATCH 3/5] PowerPC64: reject the AVX ISA selections at configure
 time

Switching the COMPILER_SUPPORTS_AVX* probe results off only changes the
defaults of the EMBREE_ISA_* options in the EMBREE_MAX_ISA=NONE branch.
An explicit -DEMBREE_ISA_AVX=ON (or a stale CMakeCache entry) and
-DEMBREE_MAX_ISA=AVX still enable the AVX kernel libraries, which get
compiled without any AVX flags and fail to build.  Fail at configure
time instead, once both ISA selection paths have resolved, and list only
the supported ISAs for EMBREE_MAX_ISA like the ARM branch does.

Tested on FreeBSD powerpc64 with GCC 14 and clang 19: EMBREE_ISA_AVX=ON,
EMBREE_ISA_AVX2=ON, EMBREE_MAX_ISA=AVX and EMBREE_MAX_ISA=AVX512 are
rejected, while the default, EMBREE_MAX_ISA=SSE4.2 and
EMBREE_MAX_ISA=DEFAULT (detects SSE2) configure as before.
---
 CMakeLists.txt | 6 ++++++
 1 file changed, 6 insertions(+)

diff --git a/CMakeLists.txt b/CMakeLists.txt
index c04b71e0a7..b1f05b0940 100644
--- a/CMakeLists.txt
+++ b/CMakeLists.txt
@@ -372,6 +372,8 @@ ENDIF()
 
 IF (EMBREE_ARM)
   SET_PROPERTY(CACHE EMBREE_MAX_ISA PROPERTY STRINGS NONE NEON NEON2X)
+ELSEIF (EMBREE_PPC64)
+  SET_PROPERTY(CACHE EMBREE_MAX_ISA PROPERTY STRINGS NONE SSE2 SSE4.2 DEFAULT)
 ELSE()  
   SET_PROPERTY(CACHE EMBREE_MAX_ISA PROPERTY STRINGS NONE SSE2 SSE4.2 AVX AVX2 AVX512 APX DEFAULT)
 ENDIF()
@@ -512,6 +514,10 @@ IF(CMAKE_CXX_COMPILER_WRAPPER STREQUAL "CrayPrgEnv")
   SET(EMBREE_ISA_SSE42 OFF)
 ENDIF()
 
+IF (EMBREE_PPC64 AND (EMBREE_ISA_AVX OR EMBREE_ISA_AVX2 OR EMBREE_ISA_AVX512 OR EMBREE_ISA_APX))
+  MESSAGE(FATAL_ERROR "PowerPC64 only supports the SSE2 and SSE4.2 ISAs (the x86 intrinsic wrappers do not cover AVX).")
+ENDIF()
+
 IF (APPLE AND EMBREE_STATIC_LIB)
 
   # count number of set ISAs

From d5f4ff20119870865fdbfbf640ffad6e177deadb Mon Sep 17 00:00:00 2001
From: Piotr Kubaj <pkubaj@FreeBSD.org>
Date: Thu, 8 Oct 2026 20:57:47 +0200
Subject: [PATCH 4/5] PowerPC64: support GCC

GCC ships the same x86 intrinsic wrappers for PowerPC as clang (clang's
ppc_wrappers were ported from GCC's rs6000 headers; GCC 14 and clang 19
define the identical set of 549 _mm_* names), so the only differences
are on the build system side:

- gnu.cmake had no PowerPC branch and handed GCC the x86 -msse2/-msse4.2
  flags, which it rejects.  Mirror the clang.cmake branch: define the
  SSE macros by hand and pass -mcpu=power8 unless the user already set
  an -mcpu.  GCC's default on FreeBSD is -mcpu=power4, which has no VSX.
- The wrappers lack the same intrinsics with both compilers
  (_mm_getcsr/_mm_setcsr, _mm_popcnt_u32/u64, _mm_stream_load_si128,
  _mm_dp_ps, _mm_insert_ps and the _MM_* MXCSR macros), so drop the
  __clang__ condition from the definitions in intrinsics.h.
- intrinsics.h includes <immintrin.h>, which GCC only provides for
  PowerPC since GCC 12; reject older versions with a clear message.

Both compilers share one more trait: on big-endian PowerPC their
_mm_movemask_ps returns the four sign bits in reverse order, which
sends the BVH traversal to a wild child pointer.  The fix is pending
upstream for clang (llvm/llvm-project#224328) and the same change is
needed in GCC's rs6000 xmmintrin.h; until both land, big-endian builds
need a fixed header with either compiler.

Tested on FreeBSD 15.1 powerpc64 (big-endian) with GCC 14.2: the
native build (internal tasking, tutorials on) compiles cleanly, all 184
kernel compile lines carry -mcpu=power8, CMAKE_CXX_FLAGS=-mcpu=power9 is
honored, and with the corrected xmmintrin.h the minimal tutorial and
"embree_verify --intensity 0.2" pass (4216 subtests passed, 0 failed,
32 ignored, the same numbers as the clang build).  With the stock header
the minimal tutorial segfaults in the BVH traversal and embree_verify
hangs in SSE2.build, with either compiler.

On FreeBSD 15.1 powerpc64le (little-endian, no header fix needed) the
GCC 14.2 build and the unchanged clang 19.1 build both pass the same
minimal tutorial and embree_verify runs (4216 passed, 0 failed, 32
ignored).
---
 common/cmake/gnu.cmake  | 13 +++++++++++++
 common/sys/intrinsics.h |  2 +-
 2 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/common/cmake/gnu.cmake b/common/cmake/gnu.cmake
index 25598f0664..9e24c7a62f 100644
--- a/common/cmake/gnu.cmake
+++ b/common/cmake/gnu.cmake
@@ -12,6 +12,19 @@ IF (EMBREE_ARM)
   SET(FLAGS_SSE42 "-D__SSE4_2__  -D__SSE4_1__")
   SET(FLAGS_AVX "-D__AVX__ -D__SSE4_2__  -D__SSE4_1__  -D__BMI__ -D__BMI2__ -D__LZCNT__")
   SET(FLAGS_AVX2 "-D__AVX2__ -D__AVX__ -D__SSE4_2__  -D__SSE4_1__  -D__BMI__ -D__BMI2__ -D__LZCNT__")
+ELSEIF (EMBREE_PPC64)
+  # GCC ships the x86 intrinsic wrappers for PowerPC since GCC 8, but
+  # immintrin.h (which intrinsics.h includes) only since GCC 12
+  IF (CMAKE_CXX_COMPILER_VERSION VERSION_LESS "12.0")
+    MESSAGE(FATAL_ERROR "GCC ${CMAKE_CXX_COMPILER_VERSION} lacks the PowerPC x86 intrinsic wrappers, GCC 12 or newer is required.")
+  ENDIF ()
+  # the x86 intrinsic wrappers need POWER8, honor a newer -mcpu from the user
+  STRING(REGEX MATCH "-mcpu=[^ ]+" FLAGS_PPC64_CPU "${CMAKE_CXX_FLAGS}")
+  IF (NOT FLAGS_PPC64_CPU)
+    SET(FLAGS_PPC64_CPU "-mcpu=power8")
+  ENDIF ()
+  SET(FLAGS_SSE2 "-D__SSE__ -D__SSE2__ ${FLAGS_PPC64_CPU}")
+  SET(FLAGS_SSE42 "-D__SSE4_2__  -D__SSE4_1__ ${FLAGS_PPC64_CPU}")
 ELSE ()
   _SET_IF_EMPTY(FLAGS_SSE2  "-msse2")
   _SET_IF_EMPTY(FLAGS_SSE42 "-msse4.2")
diff --git a/common/sys/intrinsics.h b/common/sys/intrinsics.h
index 6b58e5ecc3..37df0032f0 100644
--- a/common/sys/intrinsics.h
+++ b/common/sys/intrinsics.h
@@ -13,7 +13,7 @@
 #include "../simd/arm/emulation.h"
 #else
 #include <immintrin.h>
-#if defined(__powerpc64__) && defined(__clang__)
+#if defined(__powerpc64__)
 __forceinline unsigned int _mm_getcsr() { return 0; }
 __forceinline void _mm_setcsr(unsigned int) {}
 __forceinline int _mm_popcnt_u32(unsigned int v) { return __builtin_popcount(v); }

From 2e1287bb590081339b0504e7c41e62f1e0b20012 Mon Sep 17 00:00:00 2001
From: Piotr Kubaj <pkubaj@FreeBSD.org>
Date: Thu, 8 Oct 2026 20:57:47 +0200
Subject: [PATCH 5/5] PowerPC64: avoid the macro redefinition warnings

Every translation unit compiled with the PowerPC flags produced up to
five "macro redefined" warnings with both GCC and clang:

- platform.h defined __SSE__ and __SSE2__ empty, while the SSE2 kernel
  flags define them as 1 on the command line.  Define them as 1, which
  is also what the compilers predefine on x86.
- intrinsics.h defined _MM_DENORMALS_ZERO_ON/OFF/MASK in the PowerPC
  block although the generic fallback a few lines below already defines
  them whenever _MM_SET_DENORMALS_ZERO_MODE is missing.  Drop the
  duplicates.

With GCC 14.2 on FreeBSD powerpc64 the build goes from 910 warnings to
44, none of which are redefinitions (the rest are GCC diagnostics in
upstream code, mostly the tutorials and scene_curves.cpp).  On
powerpc64le GCC 14.2 shows the same 44 and clang 19.1 no longer reports
any macro redefinition; the clang warnings that remain are its
PowerPC-only -Wdeprecate-lax-vec-conv-all diagnostics on the SSE
emulation code, which are not touched here.
---
 common/sys/intrinsics.h | 3 ---
 common/sys/platform.h   | 4 ++--
 2 files changed, 2 insertions(+), 5 deletions(-)

diff --git a/common/sys/intrinsics.h b/common/sys/intrinsics.h
index 37df0032f0..e6e6583d3c 100644
--- a/common/sys/intrinsics.h
+++ b/common/sys/intrinsics.h
@@ -40,9 +40,6 @@ __forceinline __m128 _mm_insert_ps(__m128 a, __m128 b, const int imm) {
 #define _MM_MASK_MASK 0x1f80
 #define _MM_FLUSH_ZERO_MASK 0x8000
 #define _MM_FLUSH_ZERO_ON 0x8000
-#define _MM_DENORMALS_ZERO_ON 0x0040
-#define _MM_DENORMALS_ZERO_OFF 0x0000
-#define _MM_DENORMALS_ZERO_MASK 0x0040
 #define _MM_SET_EXCEPTION_MASK(x) _mm_setcsr((_mm_getcsr() & ~_MM_MASK_MASK) | (x))
 #define _MM_SET_FLUSH_ZERO_MODE(x) _mm_setcsr((_mm_getcsr() & ~_MM_FLUSH_ZERO_MASK) | (x))
 #endif
diff --git a/common/sys/platform.h b/common/sys/platform.h
index 776a3b8277..ea8d10633b 100644
--- a/common/sys/platform.h
+++ b/common/sys/platform.h
@@ -59,8 +59,8 @@
 
 #if defined(__powerpc64__)
 #define NO_WARN_X86_INTRINSICS
-#define __SSE__
-#define __SSE2__
+#define __SSE__ 1
+#define __SSE2__ 1
 #endif
 
 /* detect 64 bit platform */