feat(verilog): index Verilog/SystemVerilog with module-instantiation edges - #402

feat(verilog): index Verilog/SystemVerilog with module-instantiation edges#402

FHYQ-Dong wants to merge 3 commits into

colbymchenry:maincolbymchenry/codegraph:mainfrom

FHYQ-Dong:feat/verilog-systemverilog-supportFHYQ-Dong/codegraph:feat/verilog-systemverilog-supportCopy head branch name to clipboard