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WiP: PR0 (SPI write prevention through chipset locking) for nv4x_adl, setting base for other platforms/downstream forks supporting >=Skylake+ - #1818

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Nov 29, 2024
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WiP: PR0 (SPI write prevention through chipset locking) for nv4x_adl, setting base for other platforms/downstream forks supporting >=Skylake+#1818
tlaurion merged 12 commits into
linuxboot:masterfrom
tlaurion:pr0_skylake_and_more_recent

Merge remote-tracking branch 'osresearch/master' into pr0_skylake_and…

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