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Increase RXDMA buffer ring size for MLO/DBS KPI- #2053 - #1309
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Yingying Tang (MilanoPipo) wants to merge 10 commits into
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…mory profiles Currently, the RX release ring size is hardcoded to 1024 entries via DP_RX_RELEASE_RING_SIZE. This value was sufficient for older generations, but is not adequate for Wi-Fi 7 scenarios with higher aggregation, parallel processing, and increased likelihood of error bursts. In Wi-Fi 7, a PPDU can carry up to 1024 MPDUs and each MPDU may contain multiple MSDUs. In error scenarios such as REO out-of-order (OOR) events, a large number of MSDUs can be pushed to the RX release ring in a short duration. With multiple PPDUs being processed in parallel (e.g. multi-core or MLO scenarios), this can lead to significant bursts of descriptors. Field observations have shown frequent OOR conditions and back-pressure issues with smaller ring sizes. Increasing the RX release ring size helps absorb these bursts and avoids back-pressure in the RXDMA/REO pipeline. Without sufficient ring capacity (e.g. 16K), back-pressure was observed under stress conditions. To address this, make the RX release ring size configurable per memory profile by adding rx_release_ring_size to ath12k_dp_profile_params: - Default memory profile: 16384 entries - Low memory profile (512M): 8192 entries The larger size in the default profile improves robustness under high traffic and error conditions by reducing the probability of ring overflow and pipeline stalls. The reduced size in the low memory profile balances memory usage while still providing sufficient headroom compared to the previous fixed value. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.0.1-00029-QCAHKSWPL_SILICONZ-1 Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.0.c5-00481-QCAHMTSWPL_V1.0_V2.0_SILICONZ-3 Signed-off-by: Pavankumar Nandeshwar <pavankumar.nandeshwar@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Link: https://patch.msgid.link/20260721110459.2203038-1-pavankumar.nandeshwar@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
Move struct ath12k_dp_profile_params from core.h to dp.h as it is specifically used for Data Path operations. This improves code organization by keeping DP-related structures in the DP header. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-2-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
Replace DP_TX_COMP_RING_SIZE macro with ath12k_dp_tx_comp_ring_size() static inline helper. Pass the DP profile parameters explicitly to improve type safety and make the interface explicit. Update code using ATH12K_TX_COMPL_NEXT to pass ring size directly rather than deriving it from the ath12k_base structure. Also remove the unused DP_TX_IDR_SIZE macro. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-3-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
…ine helper Replace DP_RXDMA_MONITOR_BUF_RING_SIZE macro with ath12k_dp_rxdma_monitor_buf_ring_size() static inline helper. Pass the DP profile parameters explicitly to improve type safety and make the interface explicit. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-4-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
…ine helper Replace DP_RXDMA_MONITOR_DST_RING_SIZE macro with ath12k_dp_rxdma_monitor_dst_ring_size() static inline helper. Pass the DP profile parameters explicitly to improve type safety and make the interface explicit. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-5-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
Replace ATH12K_NUM_POOL_TX_DESC with the ath12k_dp_num_pool_tx_desc() static inline helper. Also replace ATH12K_TX_SPT_PAGES_PER_POOL, ATH12K_NUM_TX_SPT_PAGES, and ATH12K_RX_SPT_PAGE_OFFSET, which are derived from ATH12K_NUM_POOL_TX_DESC, with static inline helper functions. Pass the DP profile parameters explicitly to improve type safety and make the interface more explicit. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-6-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
Replace ATH12K_RX_DESC_COUNT with ath12k_dp_rx_desc_count() static inline helper, also replace ATH12K_NUM_RX_SPT_PAGES which is calculated from ATH12K_RX_DESC_COUNT into static inline helper functions and pass the DP profile parameters explicitly to improve type safety and make the interface explicit. Also remove the unused ATH12K_NUM_TX_SPT_PAGE_START macro. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-7-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
Replace DP_RX_RELEASE_RING_SIZE macro with ath12k_dp_rx_release_ring_size() static inline helper. Pass the DP profile parameters explicitly to improve type safety and make the interface explicit. No functional change intended. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20260820054804.3222296-8-aaradhana.sahu@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
…memory profile Currently, the RXDMA buffer ring size is hardcoded to 4096 and shared across all memory profiles. This prevents individual profiles from tuning the ring size based on their memory and performance requirements. Add the RXDMA buffer ring size to the memory profile configuration and implement ath12k_dp_rxdma_buf_ring_size() static inline function to access the configured value. This allows different memory profiles to select an appropriate ring size based on available system resources. Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3 Tested-on: QCC2072 hw1.0 PCI WLAN.COL.1.0.c2-00074-QCACOLSWPL_V1_TO_SILICONZ-1 Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20261007-mpp_ws-v1-1-739b1fb87d24@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
…emory profile The default RXDMA buffer ring size of 4096 entries can become a bottleneck under high RX traffic load, resulting in reduced receive throughput due to limited buffer availability. Increase the RXDMA buffer ring size to 8192 entries for the default memory profile to provide additional RX buffering and improve RX packet processing efficiency. This increases memory consumption by approximately 9-10 MiB and improves RX throughput by ~20% with the default memory profile (ATH12K_QMI_MEMORY_MODE_DEFAULT). Tested-on: QCN9274 hw2.0 PCI WLAN.WBE.1.6-01243-QCAHKSWPL_SILICONZ-1 Tested-on: WCN7850 hw2.0 PCI WLAN.HMT.1.1.c7-00108-QCAHMTSWPL_V1.0_V2.0_SILICONZ_UPSTREAM-3 Tested-on: QCC2072 hw1.0 PCI WLAN.COL.1.0.c2-00074-QCACOLSWPL_V1_TO_SILICONZ-1 Signed-off-by: Pavankumar Nandeshwar <pavankumar.nandeshwar@oss.qualcomm.com> Signed-off-by: Aaradhana Sahu <aaradhana.sahu@oss.qualcomm.com> Reviewed-by: Baochen Qiang <baochen.qiang@oss.qualcomm.com> Reviewed-by: Rameshkumar Sundaram <rameshkumar.sundaram@oss.qualcomm.com> Link: https://patch.msgid.link/20261007-mpp_ws-v1-2-739b1fb87d24@oss.qualcomm.com Signed-off-by: Jeff Johnson <jeff.johnson@oss.qualcomm.com> Signed-off-by: Yingying Tang <yingying.tang@oss.qualcomm.com>
Yingying Tang (MilanoPipo)
requested review from
a team,
Amit Kucheria (idlethread),
Kaushal Kumar (quic-kaushalk) and
Salendarsingh Gaud (sgaud-quic)
October 18, 2026 13:57
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Merge Check Failed: No Change Task Found No associated change tasks found for CR 4612917 on any of the following entities: Entities:
CR: 4612917 Please ensure the CR has a change task associated with at least one of the entities for this branch. |
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Increase RXDMA buffer ring size for MLO/DBS KPI
UPSTREAM: wifi: ath12k: Make RXDMA buffer ring size configurable per memory profile
UPSTREAM: wifi: ath12k: convert DP_RX_RELEASE_RING_SIZE to inline helper
UPSTREAM: wifi: ath12k: convert ATH12K_RX_DESC_COUNT to inline helper
UPSTREAM: wifi: ath12k: convert ATH12K_NUM_POOL_TX_DESC to inline helper
UPSTREAM: wifi: ath12k: convert DP_RXDMA_MONITOR_DST_RING_SIZE to inline helper
UPSTREAM: wifi: ath12k: convert DP_RXDMA_MONITOR_BUF_RING_SIZE to inline helper
UPSTREAM: wifi: ath12k: convert DP_TX_COMP_RING_SIZE to inline helper
UPSTREAM: wifi: ath12k: move dp_profile_params to dp.h
UPSTREAM: wifi: ath12k: Use different RX release ring sizes as per memory profiles
CRs-Fixed: 4612917