learn_uart

learn_uart is the open learning path for UART: spec → RTL → TB → waves → VIP map.

Readers and students usually open a module README (or the live tools) or clone this public repo. Authors edit content here (or via the parent monorepo checkout), rebuild slides/audio with module-slides in the parent, and push; the parent repo only stores a pinned submodule commit.

Table of contents

• Contents
• Browse or clone
• Consume from the parent
• Author: publish or update
• Two learning tracks
• Module landings
• Browser labs
• License

Contents

learn_uart/
├── README.md
├── LICENSE
├── docs/
│   ├── MODULES.md       # full module index (00–13)
│   └── TWO_TRACKS.md
├── scripts/
│   └── module.sh
├── module00-intro/
├── module06-fifo-lab/     # shipped shared lab
├── …
└── module13-wrap/

Videos and decks are optional per module. Generate with the module-slides skill in the parent monorepo when ready.

Browse or clone

• Browser labs: https://universal-verification-methodology.github.io/learning/tools/
• Syllabus (parent): syllabus.md § learn_uart

git clone https://github.com/universal-verification-methodology/learn_uart.git
cd learn_uart
chmod +x scripts/*.sh
./scripts/module.sh 06 --check

Then open module00-intro/README.md.

Consume from the parent

git clone --recurse-submodules \
  git@github.com:universal-verification-methodology/learning.git
ls courses/learn_uart

Author: publish or update

cd courses/learn_uart
# … edit module README / CHECKLIST / EXAMPLES / transcript …
cd ../..
python .cursor/skills/module-slides/scripts/transcript_to_outline.py \
  courses/learn_uart/moduleNN-slug
bash .cursor/skills/module-slides/scripts/narrate_clips.sh \
  courses/learn_uart/moduleNN-slug

Two learning tracks

Details: docs/TWO_TRACKS.md.

Track	Practice surface	Start here
A — Real RTL/TB	Paper + .v (archive; prefer learn_uart / learn_spi / learn_i2c)	docs/TWO_TRACKS.md
B — Browser lab	Platform tools	uart-frame · spec-to-rtl · baud-divider · uart-oversample · uart-errors · fifo-lab · handshake · waveform-lab

Lab status snapshot: 12 shipped · 0 planned (see docs/MODULES.md).

Module landings

Full status table: docs/MODULES.md. Clusters: 00 intro · 01–05 UART timing/errors · 06–07 datapath · 08–10 TB/waves · 11–12 VIP map · 13 wrap.

Module	Landing
00 — Welcome to UART	module00-intro
01 — UART frame	module01-uart-frame
02 — Spec → RTL checklist	module02-spec-to-rtl
03 — Baud / divider	module03-baud-divider
04 — Oversampling	module04-uart-oversample
05 — UART errors	module05-uart-errors
06 — FIFO in the datapath	module06-fifo-lab
07 — Handshake	module07-handshake
08 — Self-check TB	module08-self-check-tb
09 — TB clock / reset	module09-tb-clock-reset
10 — Waves	module10-waveform-lab
11 — TB vs UVM map	module11-tb-vs-uvm-map
12 — VIP anatomy	module12-vip-anatomy
13 — UART complete	module13-wrap

Browser labs

Shipped: uart-frame · spec-to-rtl · baud-divider · uart-oversample · uart-errors · fifo-lab · handshake · waveform-lab · tb-vs-uvm-map · self-check-tb · tb-clock-reset · vip-anatomy. Use Track A + (archive; prefer learn_uart / learn_spi / learn_i2c) for offline fidelity.

License

CC BY 4.0 — see LICENSE.