riscv64: spec compliance and regression test fix - #698
Conversation
Signed-off-by: Akif Ejaz <akifejaz40@gmail.com>
Signed-off-by: Akif Ejaz <akifejaz40@gmail.com>
The new check-functional-riscv64 target verifies FPU context switching by
watching fpu_test_val advance by 1.1f on each pass through
thread_6_and_7_entry. The GDB script deliberately treats a missing symbol
as a failure rather than silently skipping the check, but the demo no
longer defined it, so the target failed on every run:
FPU_VERIFIED_FAIL_NO_SYMBOL
The definition and the increment are restored, matching what the risc-v32
demo already carries. The functional target now passes end to end.
Three small corrections are folded in:
- tx_port.h carried a comment stating that the ISA string must include
Zicsr, but nothing enforced it, so an rv64imac build failed with a wall
of assembler "unrecognized opcode" errors. It now stops at one clear
diagnostic.
- Removed TX_RISCV_TRAP_CALL_FRAME_SIZE, which nothing referenced.
- The example .gitignore listed qemu-riscv32.log, but the runner writes
qemu-riscv64.log, so the generated log showed up as an untracked file.
Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
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Thank you for this, @akifejaz — it is a thorough piece of work, and the parts that matter most are the parts that are easiest to get wrong. The atomic Because the RISC-V jobs are still commented out in One blocking issue, now fixedThe new Commit 0e95233 added I have restored those three lines, matching what the risc-v32 demo already carries. The target now passes end to end: Three small things folded into the same commit
VerifiedI confirmed the ABI matrix from your description by assembling every port source:
I also checked the frame-size unification for self-consistency across save, restore, schedule, stack build and system return (528 = 65×8 plus 8 bytes of padding with FP, 256 without; 240/128 for the solicited frame), and confirmed the branch still merges cleanly onto Merging shortly. Thanks again for the care that went into this one. |
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A correction on my part, @akifejaz, and an apology. The commit I pushed to your branch (3b6fc4f) carried nine files it should not have. I had configured a local CMake build tree while verifying the functional test, and it was staged along with the fix — a compiled That is entirely my mistake, not a defect in your contribution. The RISC-V64 work itself is correct and stays as merged. #706 removes the files from Nothing is required from you here. Thanks again for the contribution, and sorry for the noise on your PR. |
#706) A local CMake build tree was staged by mistake alongside the RISC-V64 spec compliance work in #698, putting nine generated files on dev, including a compiled kernel.elf, build.ninja, the Ninja dependency logs and a QEMU run log. None of it belongs in the repository. The root .gitignore listed build directories by name rather than by pattern, so build/, build_qemu/, build_m7/ and the build_r52 variants were covered but a differently named tree was not. Those entries are replaced with a single build*/ pattern, which covers every existing name and any future one. No tracked file matches the new pattern. The artifacts remain reachable in history; only the working tree is corrected, since rewriting a shared branch is the greater harm. Assisted-by: Claude Code (Opus 5) <noreply@anthropic.com>
This PR corrects the RISC-V64 GNU port as per spec and its QEMU virt support.
Regression 475/475 on QEMU 6.2 (5 configs x 95), compile matrix for lp64d, lp64f, lp64 and rv64gcv, ecall/ebreak skip checked on RV64 and RV32.